型号: PXI-6229

产品编号: 779115-01

DEVICE SPECIFICATIONS NI 6229






M Series Data Acquisition: 16-Bit, 250 kS/s, 32 AI, 48 DIO, 4 AO


The following specifications are typical at 25 °C, unless otherwise noted. For more information about the NI 6229, refer to the M Series User Manual available at ni.com/ manuals.

Analog Input

Number   of channels

16 differential or 32 single ended

ADC   resolution

16 bits

DNL

No missing codes guaranteed

INL

Refer to the AI Absolute Accuracy section

Sample   rate


Single   channel maximum

250 kS/s

Multichannel maximum (aggregate)

250 kS/s

Minimum

No minimum

Timing   accuracy

50 ppm of sample rate

Timing   resolution

50 ns

Input   coupling

DC

Input   range

±0.2 V, ±1 V, ±5 V, ±10 V

Maximum   working voltage for analog inputs (signal + common mode)

±11 V of AI GND

CMRR (DC   to 60 Hz)

92 dB

Input   impedance


Device   on


AI+ to   AI GND

>10 GΩ in parallel with 100 pF

AI- to   AI GND

>10 GΩ in parallel with 100 pF

Device off

AI+ to   AI GND

820 Ω

AI- to   AI GND

820 Ω

Input   bias current

±100 pA

Crosstalk   (at 100 kHz)


Adjacent   channels

-75 dB

Non-adjacent   channels

-90 dB

Small   signal bandwidth (-3 dB)

700 kHz

Input   FIFO size

4,095 samples

Scan   list memory

4,095 entries

Data   transfers


PCI/PXI

DMA   (scatter-gather), interrupts, programmed I/O

USB

USB Signal Stream, programmed I/O

Overvoltage protection for all analog input and sense channels

Settling Time for Multichannel Measurements

Accuracy,   full-scale step, all ranges


±90 ppm   of step (±6 LSB)

4 μs convert interval

±30 ppm   of step (±2 LSB)

5 μs convert interval

±15 ppm   of step (±1 LSB)

7 μs convert interval

Typical Performance Graphs

Figure 1. Settling Error versus Time for Different Source Impedances

Figure 2. AI Small Signal Bandwidth

Figure 3. AI CMRR

AI Absolute Accuracy

Note Accuracies listed are valid for up to one year from the device external calibration.

Table 1. AI Absolute Accuracy

Nominal

Range

Positive

Full

Scale

Nominal Range

Negative

Full

Scale

Residual

Gain

Error

(ppm   of

Reading)

Residual

Offset

Error

(ppm   of

Range)

Offset

Tempco

(ppm   of

Range/°C)

Random

Noise,   σ

Vrms)

Absolute

Accuracy at   Full

Scale

(μV)

Sensitivity

(μV)

10

-10

75

20

57

244

3,100

97.6

5

-5

85

20

60

122

1,620

48.8

1

-1

95

25

79

30

360

12.0

0.2

-0.2

135

80

175

13

112

5.2

Note Sensitivity is the smallest voltage change that can be detected. It is a function of noise.

Gain tempco                                                      25 ppm/°C

Reference   tempco

5 ppm/°C

INL error

76 ppm of range

AI Absolute Accuracy Equation

AbsoluteAccuracy = Reading · (GainError) + Range · (OffsetError) + NoiseUncertainty

GainError = ResidualAIGainError + GainTempco · (TempChangeFromLastInternalCal)

+ ReferenceTempco · (TempChangeFromLastExternalCal)

OffsetError = ResidualAIOffsetError + OffsetTempco ·

(TempChangeFromLastInternalCal) + INLError

Random Noise ⋅ 3

NoiseUncertainty =  for a coverage factor of 3 σ and averaging

100 points.

AI Absolute Accuracy Example

Absolute accuracy at full scale on the analog input channels is determined using the following assumptions:

         TempChangeFromLastExternalCal = 10 °C

         TempChangeFromLastInternalCal = 1 °C

         number_of_readings = 100

         CoverageFactor = 3 σ

For example, on the 10 V range, the absolute accuracy at full scale is as follows:

GainError = 75 ppm + 25 ppm · 1 + 5 ppm · 10 = 150 ppm

OffsetError = 20 ppm + 57 ppm · 1 + 76 ppm = 153 ppm

NoiseUncertainty =  = 73 µV

AbsoluteAccuracy = 10 V · (GainError) + 10 V · (OffsetError) + NoiseUncertainty = 3,100 µV

Analog Output

Number   of channels

4

DAC   resolution

16 bits

DNL

±1 LSB

Monotonicity

16 bit guaranteed

Maximum   update rate


1   channel

833 kS/s

2   channels

740 kS/s per channel

3   channels

666 kS/s per channel

4   channels

625 kS/s per channel

Timing   accuracy

50 ppm of sample rate

Timing resolution                                               50 ns

Output   range

±10 V

Output   coupling

DC

Output   impedance

0.2 Ω

Output   current drive

±5 mA

Overdrive   protection

±25 V

Overdrive   current

10 mA

Power-on   state

±20 mV[1]

Power-off   glitch

400 mV for 200 ms

Output   FIFO size

8,191 samples shared among channels used

Data   transfers


PCI/PXI

DMA   (scatter-gather), interrupts, programmed I/O

USB

USB Signal Stream, programmed I/O

AO   waveform modes

Non-periodic waveform, periodic waveform regeneration mode from   onboard FIFO, periodic waveform regeneration from host buffer including   dynamic update

Settling   time, full-scale step,

15 ppm   (1 LSB)

6 µs

Slew   rate

15 V/µs

Glitch   energy


Magnitude

100 mV

Duration

2.6 µs

AO Absolute Accuracy

Absolute accuracy at full-scale numbers is valid immediately following internal calibration and assumes the device is operating within 10 °C of the last external calibration.

Note Accuracies listed are valid for up to one year from the device external calibration.

Table 2. AO Absolute Accuracy

Nominal

Range

Positive

Full   Scale

Nominal Range

Negative

Full   Scale

Residual

Gain   Error

(ppm of

Reading)

Gain

Tempco

(ppm/°C)

Residual

Offset

Error (ppm of   Range)

Offset

Tempco

(ppm of

Range/°C)

Absolute

Accuracy at Full

Scale   (μV)

10

-10

90

10

40

5

3,230

Reference tempco

INL error

AO Absolute Accuracy Equation

AbsoluteAccuracy = OutputValue · (GainError) + Range · (OffsetError)

GainError = ResidualGainError + GainTempco · (TempChangeFromLastInternalCal) +

ReferenceTempco · (TempChangeFromLastExternalCal)

OffsetError = ResidualOffsetError + AOOffsetTempco ·

(TempChangeFromLastInternalCal) + INLError

Digital I/O/PFI

Static   Characteristics

Number   of channels

48 total,   32 (P0.<0..31>),

16 (PFI <0..7>/P1, PFI <8..15>/P2)

Ground   reference

D GND

Direction   control

Each terminal individually programmable as input or output

Pull-down   resistor

50 kΩ typical, 20 kΩ minimum

Input   voltage protection

±20 V on up to two pins[2]

Waveform Characteristics (Port 0 Only)

Terminals used                                                 Port 0 (P0.<0..31>)

Port/sample   size

Up to 32 bits

Waveform   generation (DO) FIFO

2,047 samples

Waveform   acquisition (DI) FIFO

2,047 samples

DI or DO Sample Clock frequency                     0 MHz to 1 MHz, system and bus activity

dependent

Data   transfers


PCI/PXI

DMA   (scatter-gather), interrupts, programmed I/O

USB

USB Signal Stream, programmed I/O

DI or DO   Sample Clock source[3]

Any PFI, RTSI, AI Sample or Convert Clock, AO Sample Clock, Ctr n Internal Output, and many other   signals

PFI/Port 1/Port 2 Functionality

Functionality                                                   Static digital input, static digital output, timing input, timing output

Timing   output sources

Many AI, AO, counter, DI, DO timing signals

Debounce   filter settings

125 ns, 6.425 µs, 2.56 ms, disable; high and low transitions;   selectable per input

Recommended Operating Conditions

Table 3. PCI/PXI

Level

Minimum

Maximum

Input high voltage (VIH)

2.2 V

5.25 V

Input low voltage (VIL)

0 V

0.8 V

Output high current (IOH) P0.<0..31>

-24 mA

Output high current (IOH) PFI <0..15>/P1/P2

-16 mA

Output low current (IOL) P0.<0..31>

24 mA

Output low current (IOL) PFI <0..15>/P1/P2

-—

16 mA

Table 4. USB Devices

Level

Minimum

Maximum

Input high voltage (VIH)

2.2 V

5.25 V

Input low voltage (VIL)

0 V

0.8 V

Table 4. USB Devices (Continued)

Level

Minimum

Maximum

Output high current (IOH) P0.<0..15>

-24 mA

Output high current (IOH) P0.<16..31>

-16 mA

Output high current (IOH) PFI <0..15>/P1/P2

-16 mA

Output low current (IOL) P0.<0..15>

24 mA

Output low current (IOL) P0.<16..31>

16 mA

Output low current (IOL) PFI <0..15>/P1/P2

16 mA

Electrical Characteristics

Level

Minimum

Maximum

Positive-going threshold (VT+)

2.2 V

Negative-going threshold (VT-)

0.8 V

Delta VT hystersis (VT+ - VT-)

0.2 V

IIL input low current (Vin = 0 V)

-10 µA

IIH input high current (Vin = 5 V)

250 µA

Digital I/O Characteristics

Figure 5. DIO PFI/Port 1/Port 2: Ioh versus Voh

Figure 6. DIO Port 0: Iol versus Vol

Figure 7. DIO PFI/Port 1/Port 2: Iol versus Vol

General-Purpose Counters/Timers

Number of   counter/timers

2

Resolution

32 bits

Counter   measurements

Edge counting, pulse, semi-period, period, two-edge separation

Position   measurements

X1, X2, X4   quadrature encoding with

Channel Z reloading; two-pulse encoding

Output   applications

Pulse, pulse train with dynamic updates, frequency division,   equivalent time sampling

Internal   base clocks

80 MHz, 20 MHz, 0.1 MHz

External   base clock frequency

0 MHz to 20 MHz

Base   clock accuracy

50 ppm

Inputs

Gate,   Source, HW_Arm, Aux, A, B, Z,

Up_Down

Routing   options for inputs

Any   PFI, RTSI, PXI_TRIG, PXI_STAR, analog trigger, many internal signals

FIFO

2 samples

Data   transfers


PCI/PXI

Dedicated scatter-gather DMA controller for each counter/timer;   interrupts, programmed I/O

USB

USB Signal Stream, programmed I/O

Frequency Generator

Number   of channels

1

Base   clocks

10 MHz, 100 kHz

Divisors

1 to 16

Base   clock accuracy

50 ppm

Output can be available on any output PFI or RTSI terminal.

Phase-Locked Loop (PLL)

Note PCI/PXI devices only.

Number of PLLs                                                1

Reference   signal

PXI_STAR, PXI_CLK10, RTSI <0..7>

Output   of PLL

80 MHz   Timebase; other signals derived from

80 MHz   Timebase including 20 MHz and

100 kHz Timebases

External Digital Triggers

Source

Any PFI, RTSI, PXI_TRIG, PXI_STAR

Polarity

Software-selectable for most signals

Analog   input function

Start   Trigger, Reference Trigger,

Pause   Trigger, Sample Clock, Convert Clock,

Sample Clock Timebase

Analog   output function

Start   Trigger, Pause Trigger, Sample Clock,

Sample Clock Timebase

Counter/timer   function

Gate,   Source, HW_Arm, Aux, A, B, Z,

Up_Down

Digital   waveform generation (DO) function

Sample Clock

Digital   waveform acquisition (DI) function

Sample Clock

Device-to-Device Trigger Bus

PCI                                                                  RTSI <0..7>4

PXI

PXI_TRIG <0..7>, PXI_STAR

USB   source

None

Output   selections

10 MHz Clock, frequency generator output, many internal signals

Debounce   filter settings

125 ns, 6.425 μs, 2.56 ms, disable; high and low transitions;   selectable per input

Bus Interface


PCI/PXI

3.3 V or 5 V signal environment

USB

USB 2.0 Hi-Speed or full-speed5, 6

DMA   channels (PCI/PXI)

6, can be used for analog input, analog output, digital input,   digital output, counter/timer 0, counter/timer 1

USB   Signal Stream

4, can be used for analog input, analog output, counter/timer 0,   counter/timer 1

The PXI device supports one of the following features:

         May be installed in PXI Express hybrid slots

         Or, may be used to control SCXI in PXI/SCXI combo chassis

Table 5. PXI/SCXI Combo and PXI Express Chassis Compatibility

M Series Part   Number

SCXI Control in   PXI/SCXI Combo Chassis

PXI Express   Hybrid Slot Compatible

191332B-01

No

Yes

191332B-11

Yes

No

191322A-0x

Yes

No

4      In other sections of this document, RTSI refers to RTSI <0..7> for the PCI devices or PXI_TRIG <0..7> for PXI devices.

5      If you are using an USB M Series device in full-speed mode, device performance will be lower and you will not be able to achieve maximum sample/update rates.

6      Operating on a full-speed bus may result in lower performance.

Power Requirements

Current draw from bus during no-load condition7

+5 V

0.02 A

+3.3 V

0.25 A

+12 V

0.15 A

Current draw from bus during AI and AO overvoltage condition7

+5 V

0.02 A

+3.3 V

0.25 A

+12 V

0.25 A

Caution USB devices must be powered with an NI offered AC adapter or a National Electric Code (NEC) Class 2 DC source that meets the power requirements for the device and has appropriate safety certification marks for country of use.

USB power supply requirements                         11 to 30 VDC, 20 W, locking or non-locking

power jack with 0.080 in. diameter center pin, 5/16-32 thread for locking collars

Current Limits

Caution Exceeding the current limits may cause unpredictable behavior by the device and/or PC/chassis.

PCI


+5 V   terminal (connector 0)

1 A maximum8

+5 V   terminal (connector 1)

1 A maximum8

PXI


+5 V   terminal (connector 0)

1 A maximum8

+5 V   terminal (connector 1)

1 A maximum8

P0/PFI/P1/P2   and +5 V terminals combined

2 A maximum

7     Does not include P0/PFI/P1/P2 and +5 V terminals.

8     Older revisions have a self-resetting fuse that opens when current exceeds this specification. Newer revisions have a traditional fuse that opens when current exceeds this specification. This fuse is not customer-replaceable; if the fuse permanently opens, return the device to NI for repair.

USB

+5 V   terminal

1 A maximum8

P0/PFI/P1/P2   and +5 V terminals combined

2 A maximum

Power   supply fuse

2 A, 250 V

Physical Characteristics

Dimensions


PCI   printed circuit board

10.6 cm × 15.5 cm (4.2 in. × 6.1 in.)

PXI   printed circuit board

Standard 3U PXI

USB   Screw Terminal enclosure

(includes   connectors)

26.67 cm ×   17.09 cm × 4.45 cm

(10.5 in. × 6.73 in. × 1.75 in.)

USB   BNC enclosure

(includes   connectors)

28.6   cm × 17 cm × 6.9 cm (11.25 in. × 6.7 in. × 2.7 in.)

USB   OEM

Refer to   the NI USB-622x/625x/628x OEM

User Guide

Weight


PCI

101 g (3.5 oz)

PXI

171 g (6.0 oz)

USB   Screw Terminal

1.24 kg (2 lb 11 oz)

USB   OEM

162 g (5.7 oz)

I/O   connectors


PCI/PXI

2 68-pin VHDCI

USB   Screw Terminal

128 screw terminals

USB   BNC

30 BNCs and 60 screw terminals

USB   Screw Terminal/BNC screw terminal wiring

16 to 28 AWG

Calibration


Recommended   warm-up time


PCI/PXI

15 minutes

USB

30 minutes

Calibration   interval

1 year

Maximum Working Voltage

Maximum working voltage refers to the signal voltage plus the common-mode voltage.

Channel-to-earth                                                11 V, Measurement Category I

Measurement Category I is for measurements performed on circuits not directly connected to the electrical distribution system referred to as MAINS voltage. MAINS is a hazardous live electrical supply system that powers equipment. This category is for measurements of voltages from specially protected secondary circuits. Such voltage measurements include signal levels, special equipment, limited-energy parts of equipment, circuits powered by regulated lowvoltage sources, and electronics.

Caution Do not use for measurements within Categories II, III, or IV.

Note Measurement Categories CAT I and CAT O (Other) are equivalent. These test and measurement circuits are not intended for direct connection to the MAINS building installations of Measurement Categories CAT II, CAT III, or CAT IV.

Environmental

Operating   temperature


PCI/PXI

0 ºC to 55 ºC

USB

0 ºC to 45 ºC

Storage   temperature

-20 ºC to 70 ºC

Humidity

10% RH to 90% RH, noncondensing

Maximum   altitude

2,000 m

Pollution   Degree (indoor use only)

2

Indoor use only.

Shock and Vibration (PXI Only)

Operational shock                                              30 g peak, half-sine, 11 ms pulse (Tested in

accordance with IEC 60068-2-27. Test profile developed in accordance with

MIL-PRF-28800F.)

Random vibration

Operating

5 Hz to 500 Hz, 0.3 grms

Nonoperating

5 Hz to 500 Hz, 2.4 grms (Tested in accordance with IEC   60068-2-64. Nonoperating test profile exceeds the requirements of

MIL-PRF-28800F, Class 3.)

Safety


This product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:

         IEC 61010-1, EN 61010-1

         UL 61010-1, CSA 61010-1

Note For UL and other safety certifications, refer to the product label or the Online Product Certification section.

Electromagnetic Compatibility

This product meets the requirements of the following EMC standards for electrical equipment for measurement, control, and laboratory use:

         EN 61326-1 (IEC 61326-1): Class A emissions; Basic immunity

         EN 55011 (CISPR 11): Group 1, Class A emissions

         EN 55022 (CISPR 22): Class A emissions

         EN 55024 (CISPR 24): Immunity

         AS/NZS CISPR 11: Group 1, Class A emissions

         AS/NZS CISPR 22: Class A emissions

         FCC 47 CFR Part 15B: Class A emissions

         ICES-001: Class A emissions

Note In the United States (per FCC 47 CFR), Class A equipment is intended for use in commercial, light-industrial, and heavy-industrial locations. In Europe, Canada, Australia and New Zealand (per CISPR 11) Class A equipment is intended for use only in heavy-industrial locations.

Note Group 1 equipment (per CISPR 11) is any industrial, scientific, or medical equipment that does not intentionally generate radio frequency energy for the treatment of material or inspection/analysis purposes.

Note For EMC declarations and certifications, and additional information, refer to the Online Product Certification section.

This product meets the essential requirements of applicable European Directives, as follows:

         2014/35/EU; Low-Voltage Directive (safety)

         2014/30/EU; Electromagnetic Compatibility Directive (EMC)

         2011/65/EU; Restriction of Hazardous Substances (RoHS)

Online Product Certification

Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for this product, visit ni.com/ certification, search by model number or product line, and click the appropriate link in the Certification column.

Environmental Management

NI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.

For additional environmental information, refer to the Minimize Our Environmental Impact web page at ni.com/environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.

Waste Electrical and Electronic Equipment (WEEE)

  EU Customers At the end of the product life cycle, all NI products must be disposed of according to local laws and regulations. For more information about how to recycle NI products in your region, visit ni.com/environment/weee. 电子信息产品污染控制管理办法(中国RoHS

中国客户 National Instruments 符合中国电子信息产品中限制使用某些有害物质指令(RoHS)。关于 National Instruments 中国 RoHS 合规性信息,请登录 ni.com/environment/rohs_china。(For information about China RoHS compliance, go to ni.com/environment/rohs_china.)

Device Pinouts

Figure 9. NI USB-6229 Screw Terminal Pinout

Figure 10. NI USB-6229 BNC Top Panel and Pinout


Refer to the NI Trademarks and Logo Guidelines at ni.com/trademarks for information on NI trademarks. Other product and company names mentioned herein are trademarks or trade names of their respective companies. For patents covering NI products/technology, refer to the appropriate location: Help»Patents in your software, the patents.txt file on your media, or the National Instruments Patent Notice at ni.com/patents. You can find information about end-user license agreements (EULAs) and third-party legal notices in the readme file for your NI product. Refer to the Export Compliance Information at ni.com/ legal/export-compliance for the NI global trade compliance policy and how to obtain relevant HTS codes, ECCNs, and other import/export data. NI MAKES NO EXPRESS OR IMPLIED WARRANTIES AS TO THE ACCURACY OF THE INFORMATION CONTAINED HEREIN AND SHALL NOT BE LIABLE FOR ANY ERRORS. U.S. Government Customers: The data contained in

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© 2015—2016 National Instruments. All rights reserved.

375204C-01     Jun16



[1] When the USB Screw Terminal device is powered on, the analog output signal is not defined until after USB configuration is complete.

[2] Stresses beyond those listed under Input voltage protection may cause permanent damage to the device.

[3] The digital subsystem does not have its own dedicated internal timing engine. Therefore, a sample clock must be provided from another subsystem on the device or an external source.